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| author | Eli Zaretskii <eliz@gnu.org> | 2023-04-01 13:07:42 +0300 |
|---|---|---|
| committer | Eli Zaretskii <eliz@gnu.org> | 2023-04-01 13:07:42 +0300 |
| commit | 89ac5ba11c773764f418c92ab47a237287a0d233 (patch) | |
| tree | 32dce1dda07e500cfdabe20423c3343f2a4a9641 | |
| parent | 24ed9c7ae780780338d83603c6eec2b1cecf95d5 (diff) | |
| download | emacs-89ac5ba11c773764f418c92ab47a237287a0d233.tar.gz | |
Fix ModelSim error regexp in vhdl-mode
* lisp/progmodes/vhdl-mode.el (vhdl-compiler-alist): Fix ModelSim
error regexp. Suggested by Reto Zimmermann <reto@gnu.org>.
(Bug#62508)
| -rw-r--r-- | lisp/progmodes/vhdl-mode.el | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lisp/progmodes/vhdl-mode.el b/lisp/progmodes/vhdl-mode.el index c5ab5013fc8..b0699d8308b 100644 --- a/lisp/progmodes/vhdl-mode.el +++ b/lisp/progmodes/vhdl-mode.el @@ -286,7 +286,7 @@ Overrides local variable `indent-tabs-mode'." ;; counter_rtl.vhd(29):Conditional signal assignment line__29 ("ModelSim" "vcom" "-93 -work \\1" "make" "-f \\1" nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "modelsim" - ("\\(ERROR:\\|WARNING\\[[0-9]+\\]:\\|\\*\\* Error:\\|\\*\\* Warning: \\[[0-9]+\\]\\| +\\) \\([^ ]+\\)(\\([0-9]+\\)):" 2 3 nil) + ("^\\(ERROR\\|WARNING\\|\\*\\* Error\\|\\*\\* Warning\\)[^:]*:\\( *\[[0-9]+\]\\| ([^)]+)\\)? \\([^ \t\n]+\\)(\\([0-9]+\\)):" 3 4 nil) ("" 0) ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat" "\\1/_primary.dat" "\\1/body.dat" downcase)) |